Chameleon => DevTalk => Topic started by: valv on December 25, 2010, 06:52:07 PM

Title: wrmsr/rdmsr on a per cpu/core basis
Post by: valv on December 25, 2010, 06:52:07 PM
Some machines are manufactured with TM1 completely disabled. In an attempt to activate it I didn't managed to attach each cpu and wrmsr to it (as TM1 needs to be enabled in that way: per cpu). All I could get is TM1 for the first cpu but next ones remain inaccessible.
Any knowledge on this, please ?
Title: Re: wrmsr/rdmsr on a per cpu/core basis
Post by: rocksteady on December 26, 2010, 11:30:25 PM
Could it be that you're looking into Xeons valv?

I'm on the go right now, so can't check my documentation but IIRC, rdmsr & wrmsr must be executed @ priviledge level 0 or in real-address mode. Otherwise a #GP(0) spoils all the fun.
Title: Re: wrmsr/rdmsr on a per cpu/core basis
Post by: valv on December 27, 2010, 11:48:57 AM
not only xeons.

Indeed, rdmsr & wrmsr should be executed in that way. But what am stuck at, is how to wrmsr to a cpu other than cpu0.
I need this to activate TM1 on each cpu. What I got so far is:

1) attempting to enable TM1 for all cpus: 2) attempting to enable TM2:That is no problem for TM2 as it is globally applied. But it is not the case of TM1.
Do u understand my problem now ?

anyway, thank u for replying :)
Title: Re: wrmsr/rdmsr on a per cpu/core basis
Post by: rocksteady on December 27, 2010, 10:17:41 PM
Sorry valv i misread you, or rather it ringed a bell from a past project.

Are you investigating this for a broad array of CPUs/BIOSes ?

We've been looking into such options for Xeons some time ago when researching a project @work. One of my hw-eng guys was loosing hair over crippled implementations. A call to Intel revealed that different units will get you different surprises. I'm not sure how much of a pain it'll be to start investigating this for a broad range of CPUs and crappy BIOSes

Let me check if I can find something useful
Title: Re: wrmsr/rdmsr on a per cpu/core basis
Post by: valv on December 27, 2010, 11:32:03 PM
thank u for caring.
some dell manufactured boards have tm1/tm2 or even both disabled (the case of hp hdx series).
what I found so far, is bit 21 (lock tm1) at 0x1aa. As of apple's definition, if this bit is set (when tm1 is enabled) a prochot# on one core would force tm1 on other cores. I don't know if tm1 has to be enabled on all cores and if is applicable to (say) core2/xeon...

any findings regarding the initial question and/or obscure msr/cpuid are welcome... for the sake of progress :)
Title: Re: wrmsr/rdmsr on a per cpu/core basis
Post by: uman on February 26, 2011, 02:53:53 PM
Have you guys looked at the just-released Intel BIOS Implementation Test Suite (BITS)?

See: http://biosbits.org/

Here's the info, copied for your reference:

The Intel BIOS Implementation Test Suite (BITS) provides a bootable pre-OS environment for testing BIOSes and in particular their initialization of Intel processors, hardware, and technologies. BITS can verify your BIOS against many Intel recommendations. In addition, BITS includes Intel's official reference code as provided to BIOS, which you can use to override your BIOS's hardware initialization with a known-good configuration, and then boot an OS.

BITS functionality fits in three broad categories:

Validate: run test suites to verify recommendations
Configure: override BIOS using Intel reference code
Explore: experimental tools and information gathering
BITS consists of a modified GRUB2 bootloader, with many additional commands to probe and manipulate hardware configuration, as well as scripts using these commands to test and reconfigure hardware.

The current version of BITS focuses primarily on CPU configuration and power management. BITS supplies general tests and functionality for all Intel x86 platforms, as well as additional specific support for IntelĀ® processors based on the microarchitecture code name Nehalem and newer, which includes Intel Core i7, i5, and i3 desktop and mobile processors, and corresponding Intel Xeon server processors.
Title: Re: wrmsr/rdmsr on a per cpu/core basis
Post by: iostres on July 29, 2011, 03:43:50 PM
Hi valv,

first as a disclaimer I must say that I am not an expert on this field but just someone who once upon a time tried to execute instruction on specified processor - so what I write might be totally off.

Before system loads operating system, just cpu0 is active - other processors are in hlt state and wouldn't execute anything even if you created a virtual task with TSS. The only thing that could work (wake up processors and make them execute specific code) would be by using IPI (Interprocessor interrupt). This is an excerpt from Intel documentation:

"To execute a code stream (thread) on a halted logical processor, the operating system issues an interprocessor interrupt (IPI)."

Probably your only option would be to create a small ISR (containing your wrmsr) and then signal to one by one processor an IPI - that would make them execute your instruction on every processor.

I hope this was at least a bit helpful.