Change the processor scope to system bus. Search for "Processor" change Scope (_PR) to Scope (_SB). Follow up on CPUs reference i.e search "CPU0" change each instance of \_PR.CPU0 to \_SB.CPU0, same for CPU1, CPU2, etc.. Declaring PR is default for legacy support, not current spec. Declaring SB also supports objects needed to enable native speedstep, at least that is my understanding.
The only instance of _PR in my DSDT is at the beginning, at the part where you remove the CPU aliases. I can't find any other references to CPU0, 1, or \PR.CPU0, 1 etc. anywhere else either. So I changed it to _SB, rebooted and it locked up during boot, sometime after this message (which I've never seen before):
ACPI_SMC_PlatformPlugin :: PushCPU_CSTData - _CST Evaluation failed
Then I tried disabling "CSTATE-tech" in the BIOS but then it locked up at initialization of AppleIntelCPUblabla instead.
I have to say that I love how easy it is to test these things with a Chameleon boot CD.
My CPU is a Core 2 Duo E8500 which doesn't have Hyperthreading of course but it would be cool to get native speed stepping working. If you do more research on this, please keep us posted.
Output from sysctl -a | grep freq:
kern.exec: unknown type returned
hw.busfrequency = 1332000000
hw.cpufrequency = 3160000000
hw.tbfrequency = 1000000000
hw.tbfrequency: 1000000000
hw.cpufrequency_max: 3160000000
hw.cpufrequency_min: 3160000000
hw.cpufrequency: 3160000000
hw.busfrequency_max: 1332000000
hw.busfrequency_min: 1332000000
hw.busfrequency: 1332000000
About the ioregs you're looking for, there's a thread at the ProjectOSX forums with attached dumps from real macs. I don't know if there are any Nehalem dumps available yet though.